LATEST NEWS

• 

  C-DAC @ VLSID 2020

  VLSID, is a premium global event of VLSI Society of India (VSI) held in India in the field of VLSI design, bringing together stakeholders that includes academia, industry, R&D houses and policy makers in the field of hardware and software system design, verification, test, EDA tools development, and manufacturing of electronic circuits. The 32th International Conference on VLSI Design (VLSID 2020) was held at Bengaluru.

  C-DAC had participated in the conference and exhibition demonstrating the indigenously developed 64-bit RISC-V Quad Core Processor and its capability / applications.

• 

  VEGA Processor for DPHA

  After the successful development of RISC V based processors, C-DAC plans to use these processors in its own mass market products. As a first step towards this initiative, the 32 bit VEGA ET1031 low power processor is planned to be deployed in the Hearing Aid products. C-DAC currently has multiple hearing Aid models in the market and in future all these models will use VEGA ET1031 processor based custom Hearing Aid ASIC. C-DAC plans to bring out VEGA ET1031 processor based models by end of 2021.

  An initial fabrication of 1.5 Lakhs of Hearing Aid ASIC with VEGA ET1031 32 bit processor has been initiated and will be available by the end of next year. This will be a significant milestone towards the indigenisation of electronic products. This new ASIC will be capable to support multiple models of Hearing Aid design from Completely-in-the-Canal design to Behind-the-Ear products. The low power design of VEGA ET1031 will help in reducing the battery consumption significantly.

• 

  TechExpo 2019

  C-DAC, Thiruvananthapuram had organized a technical exhibition on 11-05-2019 as part of the National Technology Day celebrations. The day long exhibition was to propagate the advanced technology developments undertaken at C-DAC Thiruvananthapuram and to create awareness among research institutions, industries, start-ups and academia on the latest technology trends.

  Indigenously developed RISC-V Processors and other products were showcased at the exhibition. The products showcased included various products developed under the different thrust areas; VLSI and Embedded Systems, Advanced Communication, Industrial Automation, Cyber Security, Health Informatics Power Electronics, Intelligent Transportation Systems, Strategic Electronics and Education and Training.

• 

  RISC-V Summit 2018

  The RISC-V Summit is an annual event started since 2017, organized by the RISC-V foundation and aimed at providing a platform to highlight the RISC-V ecosystem, presenting both open-source developments and commercial offerings from newcomers to experienced developers. The summit comprises of keynotes from industry experts, panel discussions and broad range of tutorials.

  The 2018 edition of the summit witnessed a huge participation with more than 1,100 attendees from over 20 countries, the RISC-V Summit in Santa Clara was a true testament of the growth of the RISC-V ecosystem over the last years.

  C-DAC presented the paper titled “Design and Implementation of a RISC-V ISA based In-order Dual Issue Superscalar Processor” at the summit. The paper was presented by Mr. Libin TT, Principal Engineer, C-DAC and gave an overview of the portfolio of RISC-V processors developed by C-DAC. C-DAC also participated in the, exhibition held at Santa Clara Convention Centre, California, USA, during 3rd to 6th December 2018.